| Extreme short control cycle time |
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– 100 μs (min. 50 μs)
– new performance class for PLC application: control loops with 100 μs
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| Extreme fast I/O response time |
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– 85 μs (min. ~ 50 μs)
– Deterministic synchronised input and output signal conversion leads to low
process timing jitter.
– Process timing jitter is independent of communication and CPU jitter.
– new performance class for PLC application: control loops with 100 μs
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| Signal Oversampling |
– multiple signal conversion in one control cycle
– hard time synchronisation through distributed clocks
– for digital input/output signals
– for analog input/output signals
– support of analog I/O EtherCAT Terminals
– up to 200 kHz signal conversion
– down to 5 μs resolution
– application
– fast signal monitoring
– fast function generator output
– signal sampling independent of cycle time
– fast loop control
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| Signal time stamping (10 ns resolution) |
– extreme time measurement for digital single shot events: resolution: 10 ns,
accuracy: < 100 ns
– exact time measurement of rising or falling edges of distributed digital inputs
– exact timing of distributed output signals, independent of control cycle
– time stamping data: resolution 10 ns, accuracy < 100 ns
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| Distributed-Clocks |
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– distributed absolute system synchronisation for CPU, I/O and drive devices
– resolution: 10 ns
– accuracy: < 100 ns
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