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ET1815, ET1816 | EtherCAT IP core for Xilinx® FPGAs

ET1815, ET1816 | EtherCAT IP core for Xilinx® FPGAs

ET1815, ET1816 | EtherCAT IP core for Xilinx® FPGAs

ET1815, ET1816 | EtherCAT IP core for Xilinx® FPGAs

ET1815, ET1816 | EtherCAT IP core for Xilinx® FPGAs

ET1815, ET1816 | EtherCAT IP core for Xilinx® FPGAs

ET1815, ET1816 | EtherCAT IP core for Xilinx® FPGAs

ET1815, ET1816 | EtherCAT IP core for Xilinx® FPGAs

ET1815, ET1816 | EtherCAT IP core for Xilinx® FPGAs

The EtherCAT IP core enables the EtherCAT communication function and application-specific functions to be implemented on an FPGA (Field Programmable Gate Array – i.e. a device containing programmable logical components). The EtherCAT functionality is freely configurable. The IP core can be combined with own FPGA designs, and it can be integrated in System-on-Chips (SoCs) with soft core processors or hard processing systems via the AMBA® AXI™ interfaces. The physical interfaces and internal functions, such as the number of FMMUs and SYNC managers, the size of the DPRAM, etc., are adjustable. The process data interface (PDI) and the distributed clocks are also configurable. The functions are compatible with the EtherCAT specification and the ET1100 EtherCAT ASIC.

The ET1816 quantity-based license offers manufacturers of small lots and development service providers the possibility of entering the world of EtherCAT development with low initial investment. For the development of an EtherCAT device, the ET1816 one-time kick-off charge is required, plus ET1816-1000 royalty for 1000 devices. The royalties for 1000 devices must be paid in advance each time.

Development service providers only require ET1816 one-time kick-off charge; the ET1811-0030 system integrator OEM license is required for each customer implementation. The end customer requires the royalty license (ET1816-1000).

Product status:

Regular delivery

Product information

Configurable featuresET1815, ET1816
PHY interface1…3 ports MII, 1…3 ports RGMII or 1…2 ports RMII
FMMUs0…8
SYNC manager0…8
DPRAM0…60 KB
Distributed clocks0…2 SYNC outputs, 0…2 latch inputs (32/64 bit)
Process data interfaces32 bit digital I/O, SPI, 8/16 bit asynchronous µC interface, AMBA AXI4/AXI4 LITE interface, 64 bit general purpose I/O
Ordering information
ET1815Single-user license without quantity limitation (node-locked) for using the freely configurable EtherCAT IP core on one workstation. The license includes one year of maintenance and updates. Target hardware: selected Xilinx® FPGAs.
ET1815-0010Extension of the node-locked license (ET1815) for one additional workstation
ET1815-0020One-year maintenance extension for node-locked license (ET1815)
ET1815-0021One-year maintenance extension for the additional workstation (ET1815-0010)
ET1816One-time kick-off charge for the node-locked quantity-based license for using the freely configurable EtherCAT IP cores on one workstation (no workplace extension possible). Target hardware: selected Xilinx® FPGAs.
ET1816-1000Royalty for 1000 devices, ET1816 required
ET1816-0020One-year maintenance extension, ET1816 required
ET1816-0030System integrator OEM license, ET1816 required

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